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13.4 SummaryAlthough there is disagreement on exactly what qualifies as a RISC machine, characterizations include as small an instruction set as possible, (2) as small a set of addressing modes as possible, (3) as small a number of instruction formats as possible, (4) single-cycle execution of as many instructions as possible, (5) memory access by load-store instructions only, (6) number of user general-purpose registers as large as possible, (7) no microcode, (8) high-level language support. The type of benchmark program used to test a computer often affects the results. For example, programs such as Quicksort or Towers of Hanoi contain lots of recursive subprogram calls. It is not surprising, therefore, that these programs show a substantial improvement when executed on RISC machines with register windowing to efficiently handle the overhead of calls and returns. Programming for parallel environments involves two approaches: (1) learning how to program for concurrency and using languages which facilitate this and (2) scheduling of already-written sequential code for parallel processing. Throughout this chapter the topic of parallelism is discussed. RISC architectures are often parallel. Fault tolerance is often implemented in the presence of parallelism. Parallelism makes programs run faster. Parallelism makes programs run safer: The need for both fast and safe executions is a challenge. New architectures continue to evolve. Their effective use requires constant study of the applications for which they are intended and compiler techniques which will exploit the new architecture. |