Applied Computer-Aided Verification

People take hardware and software reliability for granted. We assume that the computer systems in workstations, planes, hospital equipment, and missile navigation systems were carefully designed and tested before reaching the market. In reality, instances of each kind of system have exhibited serious errors, even after extensive testing and simulation. The consequences have been severe, both financially and life-critically.

Computer-aided verification, a collection of techniques for formally analyzing system behavior, yields increased reliability and robustness. Industry is increasingly interested in these techniques, but few designers have been exposed to them, much less trained in their use. This seminar will explore several aspects of applying computer-aided verification in practice.

We will study techniques for modeling systems and specifying their behavior using common verification tools. In particular, we will look at protocol verification, circuit verification, and software specification. In the process, we will address such questions as:

• If computer-aided verification is so useful, why didn't it catch the Pentium floating-point bug?
• What guarantees does computer-aided verification offer?
• What theoretical considerations govern the choice of tools and techniques for particular problems?

This course meets on Wednesdays from 2-4pm in CE 1075.