1. Why are micromodels useful for specification?

2. Why are micromodels useful for analysis?

3. Are SMV models declarative or operational?  Why?

4. Propositions, states, and transitions are the fundamental building
   blocks of SMV models.  What are the fundamental building blocks in
   Alloy models?

5. What do Alloy models try to capture?  Contrast this to what SMV
   models try to capture.

6. Model checkers test whether a temporal logic specification is true
   of a design; errors consist of sequences of events that violate the
   property.  What does Alloy check?

7. How does Alloy's assertion language compare to LTL?  Can you state
   the same kinds of properties in each (be specific)?

8. What is a signature (in an Alloy specification)?