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Assumptions
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m
= memory access time = 100 nsec
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t
= TLB load time from memory = 300 nsec
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= 3 * m
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Goal
is < 5% penalty for TLB misses
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I.e.,
EAT < 1.05 * m
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EAT
= (1-p) * m + p * t < 1.05 *m
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p
< (0.05 * m) / (t – m) = 0.05 * m / 2 * m =
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0.025
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I.e.,
TLB fault rate should be < 1 per 40 accesses!
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