•Associative memory implementation in hardware
–Translates VPN to PTE (containing PFN)
–Done in single machine cycle
•TLB is hardware assist
–Fully associative – all entries searched in parallel
with VPN as index
–Returns PFN
–MMU use PFN and offset to get Physical Address
•Locality makes TLBs work
–Usually have 8–1024 TLB entries
–Sufficient to deliver 99%+ hit rate (in most cases)
•Works well with multi-level page tables