/* (c) 1999 Symbol Technologies, all rights reserved. */
/* May be distributed under the terms of GNU's General Public License, the
   text of which can be found online at http://www.gun.org/copyleft/gpl.html */

#ifndef __SPECTRUM24_H__
#define __SPECTRUM24_H__


/* The values to set the COR to in order to toggle IO mode. */
#define ENABLE_IO_MODE	0x41
#define DISABLE_IO_MODE	0x00

/* make bitmapped bytes a little easier to read (although I think if you've
   got far enough to read this you know which bits are on where) */

#define BIT_0	0x01
#define BIT_1	0x02
#define BIT_2	0x04
#define BIT_3	0x08
#define BIT_4	0x10
#define BIT_5	0x20
#define BIT_6	0x40
#define BIT_7	0x80
 
/* io port layout */
#define HSR	0x0
#define CMD	0x1
#define BSSR	0x2
#define HREG	0x3
#define PREG	0x3
#define LMA0	0x4
#define LMA1	0x5
#define MEM0	0x6
#define MEM1	0x7

/* HSR bits */
#define HSR_P188_ACTIVE	BIT_5
#define HSR_HREG	BIT_2
#define HSR_P188_INT	BIT_0

/* Host command register commands */
#define HCR_RESET	BIT_7
#define HCR_PWRUP	BIT_5
#define GEN_P188_INT	BIT_4
#define ENABLE_P188_INT	BIT_0

/* HREG commands */
#define HREG_INIT_MU	1
#define HREG_PSP_WAKEUP	3
#define HREG_RESUME	4
#define HREG_SLEEP	5
#define HREG_INIT_MAP	6

/* Common memory layout */

/* the host interface command buffer */
#define HCB	0x100

/* the adapter status registers */
#define ASR	0x110
#define RSR	0x120
#define TSR	0x130

/* the Write Operation Complete byte */
#define WOC	0x112

/* the transmit data registers */
#define TX_NEXT_BUFFER	0x140
#define TX_BUFF_SIZE	0x142
#define TX_BUFF_OFF	0x144
#define TX_BUFF_TOT	0x146

/* the receive data registers */
#define RX_PKT_LEN	0x150
#define RX_PKT_START	0x152

/* the location of the MAC address */
#define ETH_ADDR_LOC	0x160

/* the ordinal pointers */
#define ORD_TBL_1	0x170
#define ORD_TBL_2	0x172

/* the ap table pointers */
#define AP_TBL_LEN	0x174
#define AP_TBL_PTR	0x176
#define ROM_LOG_PTR	0x178

/* association table pointers (for MAP only) */
#define ASS_TBL_PTR	0x17A
#define ACL_PTR		0x17C

/* statistics buffer register */
#define STAT_TBL_LEN	0x180
#define STAT_TBL_PTR	0x182

/* 4 byte adapter time and 1 byte time valid flag */
#define ADAPTER_TIME	0x184
#define TIME_VALID	0x188

/* restart flag */
#define RESTART_FLAG	0x189

/* transmit disable flag */
#define TX_DISABLE	0x18B

/* flash memory info */
#define FLSH_CFG_PTR	0x18C
#define FLSH_STAT	0x18E

/* MKK stuff ... for japanese firmware only */
#define MKK_ENABLED	0x190
#define MKK_CALLSIGN	0x191

/* country info */
#define COUNTRY_ID	0x1A0
#define COUNTRY_NAME	0x1A2

/* restart control stuff */
#define WARM_START_REG	0x380
#define RESTART_COUNT	0x384
#define OP_MODE		0x386 /* one byte */
#define SELF_TEST_CURR	0x388
#define SELF_TEST_CUM	0x38C

/* the association status register */
#define ASSC_SR	0x50C

/* HCB commands */
#define CMD_RESET		0x00
#define CMD_SRC			0x01
#define CMD_STC			0x02
#define CMD_AMA			0x03
#define CMD_DMA			0x04
#define CMD_SAM			0x05
#define CMD_TXL			0x08
#define CMD_SKR			0x09
#define CMD_ASR_CLR		0x0C
#define CMD_RSR_CLR		0x0D
#define CMD_TSR_CLR		0x0E
#define CMD_SCN_CLR		0x0F
#define CMD_IMR_SET		0x10
#define CMD_TXI			0x11
#define CMD_TIM			0x12
#define CMD_IDL			0x13
#define CMD_STST		0x14
#define CMD_CLS			0x15
#define CMD_RTC			0x16
#define CMD_RTS_THRES		0x17
#define CMD_PMG			0x18
#define CMD_FLAGS		0x1A
#define CMD_ASR_SET		0x1B
#define CMD_FLASH		0x1C
#define CMD_ACL_ADD		0x1D
#define CMD_ACL_DEL		0x1E
#define CMD_ACL_CLR		0x1F
#define CMD_MAP_CONFIG		0x21
#define CMD_ESSID		0x27
#define CMD_PREFER		0x28
#define CMD_MANDAT		0x29
#define CMD_TX_RATE		0x2A
#define CMD_MAC_ADRS		0x2B
#define CMD_SET_AUTH_TYPE	0x2C
#define CMD_ENCRYPT_KEY		0x2D
#define CMD_ENCRYPT_KEY_ID	0x2E
#define CMD_INTERNATIONAL	0x2F

/* the asr bits */
#define RX_COMPLETE	BIT_7
#define RX_ERROR	BIT_6
#define TX_COMPLETE	BIT_5
#define STATUS_CHANGE	BIT_4
#define TX_BUSY		BIT_1
#define TX_FREE		BIT_0

/* the interrupt bits in the ASR */
#define ASR_INT_MASK	0xF0

/* the tx/rx buffer layout */
				/* these are all words except */
#define LINK_PTR	0x00
#define BUFF_LEN	0x02
#define DATA_OFF	0x04
#define TIMESTMP_MSW	0x08
#define DEST_ADDR	0x0A	/* 6 bytes (duh) */
#define SRC_ADDR	0x10	/* "   "     "   */
#define TIMESTMP_LSW	0x16
#define RSSI		0x1C	/* 1 byte */
#define FREQ		0x1D	/* "   "  */

/* Ordinal table statistics pointer */
#define RX_PACKETS	33
#define TX_PACKETS	2
#define RX_BYTES	43
#define TX_BYTES	12
#define RX_ERRORS	--
#define TX_ERRORS	16
//#define MULTICAST
#define COLLISIONS

/* extended recieve errors */
#define RX_LENGTH_ERRORS
#define RX_OVER_ERRORS
#define RX_CRC_ERRORS
#define RX_FRAME_ERRORS
#define RX_FIFO_ERRORS
#define RX_MISSED_ERRORS

#define TX_ABORTED_ERRORS
#define TX_CARRIER_ERRORS
#define TX_FIFO_ERRORS
#define TX_HEARTBEAT_ERRORS
#define TX_WINDOW_ERRORS

#endif