CPU Sim 3.1
An Interactive Java-based CPU Simulator for CS3 Courses

Dale Skrien
Department of Computer Science
Colby College
Waterville ME 04901


I will demonstrate CPU Sim 3.1, a Java application written by me for use in CS3 courses that allows users to design simple computer CPU's at the microcode level and to run machine-language or assembly-language programs on them through simulation. CPU Sim is a fully-integrated development environment that includes a text editor for writing assembly language programs and a debugger for stepping forward and backward through the execution of such programs, inspecting and optionally changing the machine state after each step.

I will discuss the features of the package and sample student assignments using it. I intend to bring a laptop to the presentation so that I can demonstrate the software in action. If other faculty are interested in using the package in their courses, I will make the software, the sample assignments, and my solutions to those assignments freely available to them.


In the early 1990's I wrote the first version of CPU Sim. Version 2 of the software won a 1993 EDUCOM Higher Education Software and Curriculum Innovation Award for "Best Engineering Software (Computer Science)". Versions 1 and 2 were written in Macintosh Common Lisp and ran only on Macintosh computers. They were discussed in the two references mentioned below and the package was used at more than a dozen colleges around the country. To enable the package to be used on other platforms, CPU Sim has been rewritten in Java using the Swing package. Furthermore, many enhancements were added to CPU Sim to give the user more flexibility and to provide more features when designing new machines and when editing or executing machine-language or assembly-language programs on them.

Features of CPU Sim 3.1

CPU Sim uses the Java Swing GUI package to provide the application interface. It uses windows to display the state of the registers and RAM and dialog boxes to display the parameters of the registers, RAM, microinstructions, and machine instructions. All the state and parameter values are editable in these windows.

CPU Sim is one of very few computer architecture simulators that allow users to modify architectures given to them or to create new architectures and then write and run machine language or assembly language programs on those architectures. In CPU Sim, the user creates a hypothetical CPU by first specifying, through the dialog boxes, the number and properties of the basic hardware components, including the registers, register arrays, and memory. The user then creates microinstructions using the set of hardware components. Next, the user constructs a machine instruction set, including, for each instruction, a name, an opcode, the number and size of operands, and the semantics of the instruction, which is specified by a sequence of microinstructions. The user can then write programs in assembly language with the built-in text editor. Finally, the user can assemble, load, and run the assembly programs they have written. They can run the programs without stopping or they can use the built-in debugger to step forward or backward through the instructions.

Sample Student Assignments

I have developed a series of assignments that allow the students to enhance gradually some simple architectures. In the process, the students receive exposure to accumulator-based, RISC-like, and stack-based architectures.

The first assignment introduces the students to the CPU Sim package. They are given a simple accumulator-based architecture with only 12 machine instructions and are asked to write small programs for it or make simple modifications to existing programs. Then the students are given a hypothetical machine to run in CPU Sim that is more RISC-like in that it includes a register array, uniform instruction formats, and load and store instructions for accessing memory. The students are then asked to rewrite the previous assignments using the new machine in ways that minimize memory accesses.

The students are then given an assignment that can only be done on the given machine using self-modifying code due to the lack of a stack or an indirect addressing mode. Then the students are asked to add a stack and push and pop instructions to the machine and redo the assignment without any self-modifying code.

In the next several assignments, the students are asked to enhance the given architecture by adding more features, including indirect, stack-relative, and immediate addressing modes for load and store instructions, procedure call and return instructions, and additional arithmetic, logical, and shift instructions. In each assignment, the students are required to implement the features in microcode and then write assembly programs, including recursive programs, that use these new features.

About midway through the semester, the students are given an architecture that implements a small subset of the JVM (Java Virtual Machine) instruction set. For the rest of the semester the students enhance this mini-JVM by adding more features, including procedure calls. These new assignments force the students to think about a CPU architecture that is very different from the previous accumulator-based or RISC-like architectures.


  1. Skrien, D. and Hosack, J. "A multilevel simulator at the register transfer level for use in an introductory machine organization class". SIGCSE Bulletin (Papers of the 22nd ACM/SIGCSE Technical Symposium on Computer Science Education), March 1991, Vol. 23, No. 1, pp. 347-351.
  2. Skrien, D. "CPU Sim: A Computer Simulator for Use in an Introductory Computer Organization Class". Journal of Computing in Higher Education, Fall 1994, Vol. 6(1), pp. 3-13.